1. Field of the Invention
The present invention relates generally to semiconductor packaging and more specifically the packaging of semiconductors devices that include optical components.
2. Description of the Related Art
There are a wide variety of digital imaging devices that are currently commercially available. The imagers used in these devices typically take the form of an integrated circuit having a charge-coupled devices (CCD) and/or CMOS imagers. CCDs and CMOS imagers are specially made integrated circuits that respond to light. CCDs are used to capture image data in devices such as telescopes, bar code readers, digital still and video cameras and scanners.
Packaging is an important and often costly aspect of the integrated circuit manufacturing process. Historically, a wide variety of techniques have been used to package integrated circuits. In an effort to reduce the costs associated packaging, there have been efforts to handle some of the packaging process steps at the wafer level. That is, before the wafer is diced into individual integrated circuit devices. One wafer level packaging approach that has been used in packaging integrated circuits having optical components is the chip-scale “ShellOP” type packaging technology developed by Shellcase Ltd. of Israel. The ShellOP package is a wafer level packaging technology where substantially all of the packaging process occurs on the IC wafer directly, instead of being a separate process after the wafer is diced.
A cross-sectional view of a typical ShellOP package is shown by way of example in FIG. 1. As seen therein, IC package 100 is an optically active device based on the ShellOP packaging design. The packaging process employs standard wafer processing techniques such as grinding, photolithography, etching, metal deposition, plating, and dicing. Unlike many packaging methods, the Shellcase process requires no lead frames, or wire bonding. The optical package comprises semiconductor bulk 105, which is held in placed in between a top glass plate 110 and a lower glass plate 115 by epoxy 120 and 125, respectively. Inverted external leads 130 are electrically connected to die terminals 135 by trace contacts 140 at junctions 145. Junction 145 is sometimes referred to as a T-junction, and contact 140 as a T-junction contact. External leads 130 are coated with a protective solder-mask 150. Solder-mask 150 is a dielectric material that electrically isolates leads 130 from external contact, and protects the lead surface against corrosion. Contacts 155 are attached to the bottom end of leads 130, and are suitable for printed circuit board (PCB) mounting by known methods. Contacts 155 may be formed by known methods such as solder-balls or plating, and may be suitably shaped for PCB mounted.
Although the ShellOP and other existing packaging processes have proven to be useful, there are continuing efforts to provide even better package designs and packaging processes for integrated circuits having imaging sensors incorporated thereon.